? semiconductor components industries, llc, 2001 july, 2001 rev. 3 1 publication order number: mc74lcx158/d mc74lcx158 advance information low-voltage cmos quad 2-input multiplexer with 5 vtolerant inputs (inverting) the mc74lcx158 is a high performance, quad 2input inverting multiplexer operating from a 2.3 to 3.6 v supply. high impedance ttl compatible inputs significantly reduce current loading to input drivers while ttl compatible outputs offer improved switching noise performance. a v i specification of 5.5 v allows mc74lcx158 inputs to be safely driven from 5 v devices. four bits of data from two sources can be selected using the select and enable inputs. the four outputs present the selected data in the inverted form. the mc74lcx158 can also be used as a function generator. current drive capability is 24 ma at the outputs. ? designed for 2.3 to 3.6 v v cc operation ? 5 v tolerant inputs interface capability with 5 v ttl logic ? lvttl compatible ? lvcmos compatible ? 24 ma balanced output sink and source capability ? near zero static supply current (10 m a) substantially reduces system power requirements ? latchup performance exceeds 500 ma ? esd performance: human body model >2000 v; machine model >200 v this document contains information on a new product. specifications and information herein are subject to change without notice. http://onsemi.com so16 d suffix case 751b marking diagrams lcx158 awlyww lcx 158 alyw tssop16 dt suffix case 948f ordering information device package shipping mc74lcx158d so16 48 units/rail mc74lcx158dr2 so16 2500 units/reel mc74lcx158dt tssop16 96 units/rail mc74lcx158dtel tssop16 2500 units/reel mc74lcx158m eiaj so16 48 units/rail mc74lcx158mel eiaj so16 2000 units/reel mc74lcx158dtr2 tssop16 2000 units/reel eiaj so16 m suffix case 966 74lcx158 alyw a = assembly location l, wl = wafer lot y = year w, ww = work week 16 1 16 16 1 1 http://onsemi.com 16 1 16 1 16 1
mc74lcx158 http://onsemi.com 2 figure 1. pinout: 16lead plastic package (top view) 15 16 14 13 12 11 10 2 1 34567 v cc 9 8 e a3 b3 y3 a2 b2 y2 s a0 b0 y0 a1 b1 y1 gnd pin names pins function an source 0 data inputs bn source 1 data inputs e enable input s select input yn outputs truth table inputs outputs output enable select y0y3 h x h l l a0a3 l h b0b3 x = don't care a0a3, b0b3 = the levels of the respective dataword inputs
mc74lcx158 http://onsemi.com 3 pin descriptions inputs a0a3 (pins 2, 5, 11, 14) nibble a inputs. the data present on these pins is transferred to the outputs when the select input is at a low level and the output enable input is at a low level. the data is presented to the outputs in inverted form for the lcx158. b0b3 (pins 3, 6, 10, 13) nibble b inputs. the data present on these pins is transferred to the outputs when the select input is at a high level and the output enable input is at a low level. the data is presented to the outputs in inverted form for the lcx158. outputs y0y3 (pins 4, 7, 9, 12) data outputs. the selected input nibble is presented at these outputs when the output enable input is at a low level. the data present on these pins is in its inverted form for the lcx158. for the output enable input at a high level, the outputs are at a high level for the lcx158. select (pin 1) nibble select. this input determines the data word to be transferred to the outputs. a low level on this input selects the a inputs and a high level selects the b inputs. control inputs enable (pin 15) output enable input. a low level on this input allows the selected data to be presented at the outputs. a high level on this input sets all of the outputs to a high level for the lcx158. figure 2. expanded logic diagram 2 a0 4 y0 7 y1 9 y2 12 y3 3 b0 5 a1 6 b1 11 a2 10 b2 14 a3 13 b3 15 enable 1 select data outputs nibble inputs
mc74lcx158 http://onsemi.com 4 maximum ratings symbol parameter value condition unit v cc dc supply voltage 0.5 to +7.0 v v i dc input voltage 0.5 v i +7.0 v v o dc output voltage 0.5 v o v cc + 0.5 output in high or low state (note 1.) v i ik dc input diode current 50 v i < gnd ma i ok dc output diode current 50 v o < gnd ma +50 v o > v cc ma i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range 65 to +150 c maximum ratings are those values beyond which damage to the device may occur. exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolute maximumrated conditions is not implied. functional operation should be restricted to the recommended operating conditions. 1. i o absolute maximum rating must be observed. recommended operating conditions symbol parameter min typ max unit v cc supply voltage operating data retention only 2.0 1.5 2.3 to 3.3 3.6 3.6 v v i input voltage 0 5.5 v v o output voltage (high or low state) (3state) 0 v cc v i oh high level output current v cc = 3.0 v 3.6 v v cc = 2.7 v 3.0 v v cc = 2.3 v 2.7 v 24 12 8 ma i ol low level output voltage v cc = 3.0 v 3.6 v v cc = 2.7 v 3.0 v v cc = 2.3 v 2.7 v +24 +12 +8 ma t a operating freeair temperature 40 +85 c d t/ d v input transition rise or fall rate, v in from 0.8 v to 2.0 v, v cc = 3.0 v 0 10 ns/v
mc74lcx158 http://onsemi.com 5 dc electrical characteristics t a = 40 c to +85 c symbol characteristic condition min max unit v ih minimum high level input voltage (note 2.) 2.3 v v cc 2.7 v 1.7 v 2.7 v v cc 3.0 v 2.0 3.0 v v cc 3.6 v 2.0 v il maximum low level input voltage (note 2.) 2.3 v v cc 2.7 v 0.7 v 2.7 v v cc 3.0 v 0.8 3.0 v v cc 3.6 v 0.8 v oh minimum high level output voltage 2.3 v v cc 3.6 v; i oh = 100 m a v cc 0.2 v v cc = 2.3 v; i oh = 8 ma 1.7 v cc = 2.7 v; i oh = 12 ma 2.2 v cc = 3.0 v; i oh = 18 ma 2.4 v cc = 3.0 v; i oh = 24 ma 2.2 v ol maximum low level output voltage 2.3 v v cc 3.6 v; i oh = 100 m a 0.2 v v cc = 2.3 v; i oh = 8 ma 0.7 v cc = 2.7 v; i oh = 12 ma 0.4 v cc = 3.0 v; i oh = 16 ma 0.4 v cc = 3.0 v; i oh = 24 ma 0.55 i i input leakage current 2.3 v v cc 3.6 v; 0 v v i 5.5 v 5.0 m a i cc quiescent supply current 2.3 v v cc 3.6 v; v i = v cc or gnd 10 m a 2.3 v v cc 3.6 v; 3.6 v v i 5.5 v 10 d i cc increase in i cc per input 2.3 v v cc 3.6 v; v ih = v cc 0.6 v 500 m a 2. these values of v i are used to test dc electrical characteristics only. ac characteristics limits t a = 40 c to +85 c v cc = 3.0 v 3.6 v v cc = 2.7 v v cc = 2.3 v to 2.7 v c l = 50 pf c l = 50 pf c l = 30 pf symbol parameter min max min max min max unit t plh propagation delay 1.0 6.5 1.0 7.5 1.0 8.5 ns t phl a or b to y 1.0 6.5 1.0 7.5 1.0 8.5 t plh propagation delay 1.0 7.0 1.0 8.0 1.0 9.0 ns t phl s to y 1.0 7.0 1.0 8.0 1.0 9.0 t plh propagation delay 1.0 7.0 1.0 8.0 1.0 9.0 ns t phl output enable to y 1.0 7.0 1.0 8.0 1.0 9.0 t oshl outputtooutput skew 1.0 ns t oslh 1.0
mc74lcx158 http://onsemi.com 6 dynamic switching characteristics t a = +25 c symbol characteristic condition min typ max unit v olp dynamic low peak voltage (note 3.) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v 0.8 v v olv dynamic low valley voltage (note 3.) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v 0.8 v 3. number of outputs defined as ano. measured with an1o outputs switching from hightolow or lowtohigh. the remaining output is measured in the low state. capacitive characteristics symbol parameter condition typical unit c in input capacitance v cc = 3.3 v, v i = 0 v or v cc 7 pf c out output capacitance v cc = 3.3 v, v i = 0 v or v cc 8 pf c pd power dissipation capacitance 10 mhz, v cc = 3.3 v, v i = 0 v or v cc 25 pf figure 3. ac waveforms pulse generator r t dut v cc r l c l figure 4. test circuit c l = 50 pf or equivalent (includes jig and probe capacitance) r l =r 1 = 500 w or equivalent r t =z out of pulse generator (typically 50 w ) waveform 1 inverting propagation delays t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns 2.7 v 0 v v oh v ol a, b, s yn t plh t phl 1.5 v 1.5 v 1.5 v 1.5 v waveform 2 inverting propagation delays t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns 2.7 v 0 v v oh v ol e , s yn t plh t phl 1.5 v 1.5 v 1.5 v 1.5 v
mc74lcx158 http://onsemi.com 7 package dimensions soic16 d suffix case 751b05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 tssop16 dt suffix case 948f01 issue o ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. section nn seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g detail e f m l 2x l/2 u s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) t v w 0.25 (0.010) 16x ref k n n
mc74lcx158 http://onsemi.com 8 package dimensions eiaj so16 m suffix case 96601 issue o h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74lcx158/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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